The present invention relates generally to integrated circuits (ICs). More particularly, the present application relates to systems for and processes of patterning of contact, via, and trench structures on a layer or substrate utilized in IC fabrication.
The semiconductor or integrated circuit (IC) industry aims to manufacture ICs with higher and higher densities of devices on a smaller chip area to achieve greater functionality and to reduce manufacturing costs. This desire for large scale integration requires continued shrinking of circuit dimensions and device features. The ability to reduce the size of structures, such as, trenches, contact holes, vias, gate lengths, doped regions, and conductive lines, is driven by lithographic performance.
IC fabrication often utilizes a mask or reticle to form an image or pattern on one or more layers comprising a semiconductor wafer. Electromnagnetic energy such as radiation is transmitted through or reflected off the mask or reticle to form the image on the semiconductor wafer. The wafer is correspondingly positioned to receive the radiation transmitted through or reflected off the mask or reticle. The radiation can be light at a wavelength in the ultraviolet (UV), vacuum ultraviolet (VUV), deep ultraviolet (DUV), or extreme ultraviolet (EUV) range. The radiation can also be a particle beam such as an x-ray beam, an electron beam, etc.
Typically, the image on the mask or reticle is projected and patterned onto a layer of photoresist material disposed over the wafer. The areas of the photoresist material upon which radiation is incident undergo a photochemical change to become suitably soluble or insoluble in a subsequent development process. In turn, the patterned photoresist layer is used to define doping regions, deposition regions, etching regions, and/or other structures comprising the IC.
As integrated circuit device dimensions continue to shrink to increase the speed and density of devices, it becomes necessary to print contact hole and via features as well as gate and trench features with dimensions that are smaller than the resolution limit of conventional lithographic techniques. Sub-lithographic patterning of contact holes, gate conductors, trenches and vias is extremely difficult because of mask error enhancement factor (MEEF). MEEF increases as the exposure wavelength decreases. In general, lithographic resolution (w) is governed by three parameters: wavelength of light used in the exposure system (xcex), numerical aperture of exposure system (NA), and a k1 factor which is a measure of the level of difficulty of the process. Lithographic resolution can be defined by the following equation:   w  =            k      1        ⁢          λ      NA      
Resolution can be improved by an improvement in any of these factors or a combination of these factors (i.e., reducing the exposure wavelength, increasing the NA, and decreasing the k1 factor). However, reducing the exposure wavelength and increasing the NA are expensive and complex operations.
Sub-lithographic resolution has been achieved using photoresist modification processes. Conventional photoresist modification processes typically pattern the photoresist in a conventional lithographic process and use chemical or heat procedures after development of the photoresist to reduce the size of the patterned features or to decrease the size of contact holes. One such process is a resist enhancement lithography assisted by chemical shrink (RELACS) process. The RELACS process can use polymers with an R2 coating and R200 developer to shrink the size of contact holes. Another such process is a heat reflow process, in which photoresist is partially liquified to reduce the diameter of contact holes and vias. Yet another such process reduces feature sizes by chemical etching.
Processes which manipulate the photoresist pattern after it is formed can be susceptible to unpredictable mechanical deformation as well as poor mechanical stability. For example, mechanical deformations can be caused by capillary forces, inadequate inherent mechanical stability, and/or the impact of etch and species. Accordingly, there is still a need to increase the resolution available through lithography.
Thus, there is a need to improve the resolution of lithography by decreasing the k1 factor. Further, there is a need to achieve sub-lithographic patterning of contact holes, via features, trenches and gates. Further still, there is a need to reduce feature sizes without the use of RELACS chemical etch, heat flow and/or processes. Further still, there is a need for an inexpensive process for improving (reducing) the size of features or holes in features which can be lithographically patterned. Yet further, there is a need to lithographically pattern photoresist using lower doses of radiation.
An exemplary embodiment relates to an integrated circuit fabrication process. The process includes exposing a photoresist layer to a pattern and providing an hydrophilic layer above the photoresist layer. The pattern is a matter of electromagnetic energy. The polymers in the hydrophilic layer diffuse into the exposed region of the photoresist layer upon baking the photoresist/hydrophilic overlayer film structure. The diffusion causes plasticization of photoresist layer in exposed regions relative to unexposed regions.
Another exemplary embodiment relates to a method of patterning a photoresist layer for an integrated circuit. The method includes steps of providing a pattern of electromagnetic energy to a photoresist layer, baking the photoresist layer, coating a hydrophilic layer above the photoresist layer, baking the photoresist/hydrophilic overlayer film structure, and developing the photoresist layer. The polymers in the hydrophilic overlayer diffuse into the exposed region of the photoresist layer upon baking. The diffusion causes the plasticization of the photoresist layer in the exposed regions relative to the unexposed regions. The photoresist layer is developed to form a photoresist pattern similar to the pattern of electromagnetic energy. Resolution is increased due to at least in part to the overlayer.
Still another exemplary embodiment relates to the lithographic medium. The lithographic medium includes a patterned photoresist material including first regions of exposure to electromagnetic energy and second regions of non-exposure to the electromagnetic energy. The medium also includes a layer of hydrophilic material.